// Projects

Projects

Two tracks, one standard: every project below ends in something measurable. Each one comes with proof you can open: a live app with its source, or a full PDF report.

Showing all 13 projects

Data / IT · Lead Solo project
Power BI dashboard from the IoT monitoring project: KPI cards, temperature trend with rolling average, and status breakdown
The Power BI dashboard, from the report

IoT Environmental Monitoring & Analytics Dashboard

A full pipeline from simulated sensors to a Power BI dashboard that flags dangerous air conditions.

Built an end-to-end IoT data project: an ESP32 with a DHT22 sensor simulated in Wokwi, a Python pipeline to clean and structure the readings, and a Power BI dashboard with custom DAX measures on top. The dashboard revealed that 41% of readings breached safe environmental thresholds, including 27 critical events that would warrant immediate action in a real deployment.

ESP32PythonPower BIDAXWokwi
Data / IT · Live Solo project
The Job Application Tracker: pipeline stats, status filters and company search
The tracker running on my own applications

Job Application Tracker

A deployed full-stack tool that tracks every application through an eight-stage pipeline with a complete audit trail.

Built to manage my own job search properly instead of in a spreadsheet: a FastAPI backend on SQLite with eight validated REST endpoints that reject malformed dates, impossible data and duplicate applications while deliberately allowing reapplication after a rejection. A 7-test pytest suite covers the full lifecycle against an isolated database, and it caught a real bug in how the connection layer resolved file paths. Deployed on Render with auto-deploy on every push.

PythonFastAPISQLitepytestRender
Data / IT · Live Solo project
FreshRoute restaurant owner view showing incoming orders in confirmed and preparing states with role-specific actions
The restaurant owner view: only the actions an owner is allowed

FreshRoute: Role-Based Delivery Platform

A three-role food delivery platform where ordering, running a kitchen and riding are enforced as genuinely different jobs, not one shared screen.

A full-stack delivery platform built solo with React and FastAPI, where customers, restaurant owners and riders each get a server-side-enforced set of permitted actions instead of three skins on one shared screen. Rider claiming is atomic at the database level, so two riders racing for the same order cannot both win it, and an order is not actually closed until the customer confirms receipt, not just when the rider says it arrived. Customers get a ten-second grace window to self-cancel after ordering, enforced by the backend's own clock rather than the browser's. Twelve restaurants across ten cuisines ship through one cart with Haversine distance-based delivery pricing, and an 11-test pytest suite covers the full order lifecycle and its role boundaries.

ReactFastAPISQLitepytestRender
Data / IT Solo project
ServiceNow Platform Analytics dashboard with four charts: incidents by priority, category, state and week
The four-chart dashboard over 200 synthetic incidents

ServiceNow ITSM Service Desk

A hands-on IT service desk build on ServiceNow, from incident reporting to access control, documented with test evidence.

Built on a ServiceNow Personal Developer Instance in four parts. Seeded 200 synthetic incidents with a GlideRecord script across five categories and three assignment groups, verified them with a read-only check that found zero data errors, and charted them in a four-chart dashboard. Built a New Laptop Request catalog item with manager approval and four fulfillment tasks, and found and fixed a rejection path that left the requested item open. Set up a knowledge base with reader and contributor roles, where testing showed that a user with no roles could still read every article. Locked down a custom table with five ACLs and ran 18 checks across four user roles, including REST calls. All data is synthetic, and the README lists what was not tested.

ServiceNowJavaScriptGlideRecordPlatform AnalyticsACLs
Data / IT · Live Solo project, 2024 original and 2026 rebuild
SlickScores game page showing a community score, the one review per account rule and a list of reviews
A game page with its community score and reviews

SlickScores: Game Rating Platform

A training project from Ooredoo, rebuilt two years later with live API data and production-grade auth.

The 2026 rebuild replaced roughly 25 hand-added games with a live catalogue of 100+ PlayStation titles from the RAWG API (with a fallback catalogue so it never breaks), moved password validation from the React client to server-side enforcement with salted hashes, and added a one-review-per-account rule enforced by a database constraint so it holds even against direct API calls. A deterministic seeder generates 759 realistic reviews for an always-populated demo, backed by 8 passing pytest tests.

ReactFlaskSQLiteRAWG APIpytest
Engineering · Lead Solo project
Power split between engine, motor and battery across the NEDC drive cycle
Engine, motor and battery power split over the NEDC, Figure 16 of the report

Series PHEV Power Management Simulation

A hybrid vehicle energy controller in MATLAB Simulink, benchmarked against the theoretical optimum.

Modelled a series plug-in hybrid electric vehicle in MATLAB/Simulink using the QSS Toolbox and designed a rule-based thermostatic controller for its power management. Rather than stopping at "it works," I benchmarked it against a Dynamic Programming solution and quantified the gap at 37.8% above the optimum. Validated across 4 standard drive cycles, showing 71 to 98% fuel reduction versus a conventional ICE baseline.

MATLABSimulinkQSS ToolboxDynamic Programming
Engineering Jadavpur VLSI internship · group lab report
Nexys 4 Artix-7 FPGA board running the 7-segment display project
The Nexys 4 Artix-7 board running the 7-segment display project

Verilog & FPGA Lab: Digital Systems

Real-time FPGA systems on Artix-7, from combinational basics to displays and shift registers.

The first of three practicals from a VLSI Design summer training program at Jadavpur University's IC Design & Fabrication Centre. Built real-time FPGA systems on Artix-7: 7-segment and LCD display drivers, shift registers, counters and clock division, on top of adders, decoders and multiplexers designed in Verilog and verified in Xilinx Vivado. Delivered 4+ FPGA lab projects, rated satisfactory, then sat a written exam covering the whole practicum and earned Grade A. Every module in the published repo is independently verified to compile with Icarus Verilog.

VerilogXilinx VivadoArtix-7 FPGADigital Design
Engineering Jadavpur VLSI internship · group lab report
T-Spice simulation output showing the input square wave and inverted output of a CMOS inverter
T-Spice output waveform for the CMOS inverter, from the report

EDA (Digital & Analog) Lab: CMOS Circuit Design

Fifteen CMOS circuits, digital and analog, designed and simulated transistor-level in T-Spice.

The second of three practicals from the same Jadavpur summer training program. Digital: resistive-load and CMOS inverters, NAND, NOR, a transmission gate, AND/OR/XOR gates built from transmission gates, and a reusable buffer subcircuit. Analog: CMOS inverter DC transfer characteristics under resistive and capacitive load, a current mirror, a differential amplifier, and an LC voltage-controlled oscillator.

T-SpiceCMOS DesignAnalog CircuitsS-Edit / W-Edit
Engineering Jadavpur VLSI internship · group lab report
Thermal vacuum evaporation machine used for metal deposition on the wafer
The thermal vacuum evaporation machine used for metal deposition, from the report

Microelectronics Lab: Silicon Fabrication

Hands-on coverage of core silicon IC fabrication, in a working cleanroom.

The third of three practicals from the same Jadavpur summer training program. Covered the full silicon fabrication sequence: cleaning, oxidation, photolithography, diffusion and metallization. Operated a thermal vacuum evaporation machine to deposit Aluminium and Silver thin films onto a masked wafer, and a diffusion pump to bring the deposition chamber to high vacuum. No source code applies here; this one is physical process work, not a programmable artifact.

Silicon FabricationThermal EvaporationDiffusion PumpCleanroom
Engineering Solo project
Console output of the Sudoku generator showing a generated medium-difficulty puzzle
A generated medium-difficulty puzzle, from the report

Sudoku Generator & Solver (C++)

A modern C++17 console app that generates puzzles with a guaranteed unique solution, and solves them.

Built a 9x9 Sudoku generator and solver in modern C++: recursive backtracking fills a randomized valid grid, then cells are removed one at a time while a solution counter proves the puzzle still has exactly one answer. Interactive play enforces the rules and protects given cells, with three difficulty levels and reveal-on-demand. A rewrite of an early OOP course project into portable, standard-library C++17 with all state encapsulated in a single class.

C++17OOPBacktrackingSTL
Engineering Solo project
Circuit diagram: NodeMCU ESP8266 driving a four-channel relay module and four LEDs on a breadboard
NodeMCU ESP8266, four-channel relay module and four LED channels, from the report

Voice-Controlled Wi-Fi Home Automation

ESP8266 firmware that lets you switch home devices with your voice over Wi-Fi.

Built a voice-controlled home automation system on NodeMCU/ESP8266: firmware that joins the local Wi-Fi network, runs a small web server, and switches a four-channel relay module from an Android app's buttons or voice commands. Demonstrated IP-based, app-to-hardware control across four independent channels, the complete path from a phone command to a physical switching action.

NodeMCUESP8266IoTEmbedded C
Engineering · Lead Solo project
Nyquist plot of the 2RC battery equivalent circuit model impedance, showing two semicircular arcs
Nyquist impedance plot of the 2RC battery model, from the report

Battery Management: ECM & SOC Estimation

Equivalent circuit modelling, impedance analysis, and Simulink-based SOC/capacity estimation for an EV battery pack.

Two Advanced Energy Storage Systems projects covering core Battery Management System functions. Built a 2RC equivalent circuit model in MATLAB, ran a Nyquist impedance analysis, and scaled it to a 110S72P EV-scale pack simulated under real UDDS and HWFET drive cycles. Separately, built a Simulink implementation of rest-detection capacity estimation and coulomb-counting SOC tracking, estimating a 153.8 Ah pack capacity. Every reported result was independently re-verified by re-running the MATLAB code and cross-checking every parameter against the official assignment sheet, which surfaced and fixed one real discrepancy in the simulation sampling time.

MATLABSimulinkBattery Management SystemsSignal Processing
Engineering Reconfigurable Computing coursework · co-authored with Kamran Shahid
Questa simulation waveform showing the byte_processor FSM computing seven consecutive byte differences and pulsing done
Questa waveform: all 7 byte differences and the done pulse, independently reproduced with GHDL

Reconfigurable Computing: VHDL on FPGA

VHDL digital systems from combinational logic through a full FSM design, synthesized and timed on a real Intel FPGA.

Three assignments progressing from basic combinational and sequential building blocks (a 12-bit counter implemented both structurally and behaviourally, for direct comparison) through a sequential restoring binary divider FSM, to a complete 4-state byte-processing system: ASM chart, VHDL, Questa simulation, and Intel Quartus Prime synthesis to a real Max 10 FPGA (192 logic elements, 83 registers, 189.83 MHz Fmax). Every design was independently re-verified by compiling and simulating all of them with GHDL, including 6 original test vectors for the divider and a direct comparison confirming the structural and behavioural counters are functionally equivalent.

VHDLIntel Quartus PrimeFPGADigital Design
// Resume

Want the full picture?

The reports go deeper than any resume can. But if you want the short version: